DocumentCode
1638715
Title
Accurate thermal noise model for deep-submicron CMOS
Author
Scholten, A.J. ; Tromp, H.J. ; Tiemeijer, L.F. ; van Langevelde, R. ; Havens, R.J. ; De Vreede, P.W.H. ; Roes, R.F.M. ; Woerlee, P.H. ; Montree, A.H. ; Klaassen, D.B.M.
Author_Institution
Philips Res. Lab., Eindhoven, Netherlands
fYear
1999
Firstpage
155
Lastpage
158
Abstract
Extensive measurements of drain current thermal noise are presented for 3 different CMOS technologies and for gate lengths ranging from 2 /spl mu/m down to 0.17 /spl mu/m. Using a surface-potential-based compact MOS model with improved descriptions of carrier mobility and velocity saturation, all the experimental results can be described accurately without invoking carrier heating effects or introducing additional parameters.
Keywords
MOSFET; carrier mobility; semiconductor device models; semiconductor device noise; surface potential; thermal noise; 0.17 to 2 micron; MOSFET; carrier mobility; deep-submicron CMOS technology; drain current; surface potential; thermal noise model; velocity saturation; CMOS technology; Circuit noise; Current measurement; Frequency; Low-frequency noise; MOSFETs; Noise figure; Noise measurement; Performance evaluation; Semiconductor device modeling;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1999. IEDM '99. Technical Digest. International
Conference_Location
Washington, DC, USA
Print_ISBN
0-7803-5410-9
Type
conf
DOI
10.1109/IEDM.1999.823868
Filename
823868
Link To Document