Title :
Analysis of process margins for emitter-base self-alignment structures through a combination of simulation and experiment
Author :
Inou, K. ; Kondo, M. ; Itoh, N. ; Tsuboi, Y. ; Yoshino, C. ; Iinuma, T. ; Nakajima, H. ; Katsumata, Y. ; Iwai, H.
Author_Institution :
Toshiba Corp., Kawasaki, Japan
Abstract :
The process margins of an emitter-base self-alignment structure were analyzed using two-dimensional simulations and experiments. The margins were obtained quantitatively in terms of ECL propagation delay time. It was found that the margin for emitter opening overetching was very large when the intrinsic base impurity was introduced before base sidewall formation. Misalignment of the emitter opening and the base opening was also analyzed. It was found that an alignment error of less than 0.2 μm, which is within the misalignment margin of currently available steppers, does not lead to serious problems
Keywords :
bipolar integrated circuits; integrated circuit technology; large scale integration; semiconductor process modelling; ECL propagation delay time; alignment error; base sidewall formation; emitter opening overetching; emitter-base self-alignment structures; intrinsic base impurity; opening misalignment; process margins; two-dimensional simulations; Analytical models; Boron; Capacitance; Circuits; Current density; Etching; Impurities; Propagation delay; Ultra large scale integration; Uncertainty;
Conference_Titel :
Bipolar/BiCMOS Circuits and Technology Meeting, 1992., Proceedings of the 1992
Conference_Location :
Minneapolis, MN
Print_ISBN :
0-7803-0727-5
DOI :
10.1109/BIPOL.1992.274071
