A background optimization method for PLL by measuring phase jitter performance

This paper describes a background (BG) optimization method for Phase-Locked-Loop(PLL). Measuring the phase shift of the voltage controlled oscillator(VCO) at each input reference clock, we can determine the phase jitter performance exactly. Using the combination of the global optimization method at initial phase and the local optimization method for background calibration always gives the PLL the smallest jitter performance under any conditions.