• DocumentCode
    1639160
  • Title

    Design and demonstration of new operation mode multi-emitter resonant tunneling hot electron transistors for one-transistor-SRAM-cell and peripheral logic circuitry

  • Author

    Takatsu, M. ; Adachihara, T. ; Mori, T. ; Awano, Y. ; Yokoyama, N.

  • Author_Institution
    Fujitsu Labs. Ltd., Kawasaki, Japan
  • fYear
    1999
  • Firstpage
    219
  • Lastpage
    222
  • Abstract
    We have designed and developed a new read/write operation mode one-transistor-SRAM-cell and its peripheral circuits using InGaAs multi-emitter resonant tunneling hot electron transistors (ME-RHETs). A new mode for write operation, based on the monostable-bistable transition of the resonant tunneling emitter and the bias-dependent current gain, is proposed to improve operating margins. To reduce the standby power consumption of a memory cell and increase current driving capability for peripheral circuits simultaneously, the ME-RHET structure is designed so as to use the first resonant state for the memory cell and the second resonant state for peripheral circuits. We have also designed a full set of SRAM components using the ME-RHETs, including cell array, decoder and a read/write circuit. We have succeeded in fabricating these circuits and demonstrated the correct read/write operation of the cell array combined with read/write circuits at 77 K.
  • Keywords
    III-V semiconductors; SRAM chips; bipolar memory circuits; cellular arrays; gallium arsenide; hot electron transistors; indium compounds; integrated circuit design; resonant tunnelling transistors; 77 K; III-V semiconductors; InGaAs; ME-RHETs; bias-dependent current gain; cell array; current driving capability; first resonant state; memory cell; monostable-bistable transition; multi-emitter resonant tunneling hot electron transistors; one-transistor-SRAM-cell; operating margins; peripheral logic circuitry; read/write operation mode; second resonant state; standby power consumption; Electrons; Indium gallium arsenide; Laboratories; Logic circuits; Logic design; RLC circuits; Random access memory; Resonance; Resonant tunneling devices; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 1999. IEDM '99. Technical Digest. International
  • Conference_Location
    Washington, DC, USA
  • Print_ISBN
    0-7803-5410-9
  • Type

    conf

  • DOI
    10.1109/IEDM.1999.823883
  • Filename
    823883