Title :
High-resolution on-chip propagation delay detector for measuring within-chip and chip-to-chip variation
Author :
Matsumoto, Takashi
Author_Institution :
Fujitsu Labs. Ltd., Tokyo, Japan
Abstract :
We propose a circuit that can measure the propagation delay of a logic circuit directly even for one fan-out 1 inverter of CMOS 90 nm node technology. We obtained high-resolution (1 ps) by converting the propagation delay to the control voltage of the voltage-controlled delay line (VCDL) in Delay-Locked Loop (DLL). The circuit was fabricated with 90 nm CMOS technology and we have verified the function. This circuit can be used for measuring within-chip and chip-to-chip variation that is important for design automation in sub-100nm technology.
Keywords :
CMOS logic circuits; integrated circuit measurement; integrated circuit testing; phase locked loops; 1 ps; 90 nm; Delay-Locked Loop; chip-to-chip variation; high-resolution on-chip propagation delay detector; logic circuit; one fan-out 1 inverter; propagation delay; voltage-controlled delay line; within-chip variation; CMOS logic circuits; CMOS technology; Delay lines; Design automation; Detectors; Inverters; Logic circuits; Propagation delay; Semiconductor device measurement; Voltage control;
Conference_Titel :
VLSI Circuits, 2004. Digest of Technical Papers. 2004 Symposium on
Print_ISBN :
0-7803-8287-0
DOI :
10.1109/VLSIC.2004.1346577
