Title :
Reduction of threshold voltage deviation in Damascene metal gate MOSFETs
Author :
Yagishita, A. ; Saito, T. ; Nakajima, K. ; Inumiya, S. ; Matsuo, K. ; Akasaka, Y. ; Ozawa, Y. ; Yano, H. ; Minamibaba, G. ; Matsui, Y. ; Tsunashima, Y. ; Suguro, K. ; Arikado, T. ; Okumura, K.
Author_Institution :
ULSI Process Eng. Lab., Toshiba Corp., Yokohama, Japan
Abstract :
The Damascene metal gate transistors are found to exhibit characteristics superior to those of the conventional polysilicon gate transistors with respect to the threshold voltage deviation (/spl Delta/V/sub th/) and the subthreshold swing (S-factor) when the metal gate work function deviation (crystal orientation deviation) is suppressed by using the inorganic CVD technique. The mechanisms of the gate length dependence of /spl Delta/V/sub th/ and S-factor in the Damascene metal gate transistors can be explained by metal gate work function deviation in the channel region.
Keywords :
CVD coatings; MOS integrated circuits; MOSFET; integrated circuit metallisation; semiconductor device metallisation; work function; Al-TiN; Damascene metal gate MOSFETs; S-factor; W-TiN; channel region; gate length dependence; inorganic CVD technique; metal gate work function; subthreshold swing; threshold voltage deviation reduction; work function deviation suppression; Electrodes; Insulation; Laboratories; MOSFETs; Metal-insulator structures; Plasma density; Plasma devices; Plasma immersion ion implantation; Plasma materials processing; Threshold voltage;
Conference_Titel :
Electron Devices Meeting, 1999. IEDM '99. Technical Digest. International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-5410-9
DOI :
10.1109/IEDM.1999.823892