Title :
A Device Level Auto Place And Wire Methodology For Analog And Digital Masterslices
Author :
Trnka, J. ; Hedman, R. ; Koehler, G. ; Ladin, K.
Author_Institution :
IBM System Products Division, Rochester, NY
Keywords :
Bars; Circuit simulation; Circuit topology; Design methodology; Flowcharts; Image segmentation; Monte Carlo methods; Resistors; Wire; Wiring;
Conference_Titel :
Solid-State Circuits Conference, 1988. Digest of Technical Papers. ISSCC. 1988 IEEE International
Conference_Location :
San Francisco, CA, USA
DOI :
10.1109/ISSCC.1988.663718
