DocumentCode :
163953
Title :
Area efficient FIR filter using graph based algorithm
Author :
Kumar, C. Uthaya ; Rabi, B. Justus
Author_Institution :
Karpagam Univ., Coimbatore, India
fYear :
2014
fDate :
8-8 July 2014
Firstpage :
495
Lastpage :
498
Abstract :
In today´s world the most widely used operation performed in DSP is finite impulse response (FIR) filtering. Design of low-complexity multiple constant multiplication (MCM) operation which reduces the complexity of many digital signal processing systems. In this paper, we design an enhanced fir filter using Graph Based algorithm. In that fir filter structure, we use modified carry save adder in the place of conventional adder. By using modified carry save adder, carry element is getting eliminated. It reduces area and power than existing one. The code is written in VHDL.
Keywords :
FIR filters; adders; carry logic; hardware description languages; DSP; FIR filter; MCM operation; VHDL; carry save adder; digital signal processing systems; finite impulse response filtering; graph based algorithm; multiple constant multiplication; Adders; Algorithm design and analysis; Conferences; Digital signal processing; Finite impulse response filters; Market research; Signal processing algorithms; Carry Save Adder; Finite Impulse Response (FIR) filter; Graph Based (GB) algorithm; Modified Carry Save Adder;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Current Trends in Engineering and Technology (ICCTET), 2014 2nd International Conference on
Conference_Location :
Coimbatore
Print_ISBN :
978-1-4799-7986-8
Type :
conf
DOI :
10.1109/ICCTET.2014.6966346
Filename :
6966346
Link To Document :
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