Title :
Low power SRAM menu for SOC application using Yin-Yang-feedback memory cell technology
Author :
Yamaoka, Masanao ; Osada, Ken´ichi ; Tsuchiya, Ryuta ; Horiuchi, Masatada ; Kimura, Shin´ichiro ; Kawahara, Takayuki
Author_Institution :
Central Res. Lab., Hitachi Ltd., Tokyo, Japan
Abstract :
We have developed the new "Yin-Yang" feedback technology for SRAM cells. This technology is applied to six-transistor cells and four-transistor cells, which are composed of transistors with the new D2G-SOI structure. At the 65-nm process node, these cells can operate at 0.7 V in mass-produced LSIs under real usage conditions. Max operating speeds are 300 MHz for the six-transistor and 200 MHz for the four-transistor cell. Leakage current of the four-transistor cell is about 1/1000 that of a conventional four-transistor cell. These cells provide a SRAM menu that allows us to optimally balance the requirements of various types of SRAM in low-power LSIs.
Keywords :
CMOS memory circuits; SRAM chips; circuit feedback; 0.7 V; 200 MHz; 300 MHz; 65 nm; SOC application; Yin-Yang-feedback memory cell technology; four-transistor cells; leakage current; low power SRAM menu; six-transistor cells; Cache memory; Cellular phones; Central Processing Unit; Circuits; Energy consumption; Feedback; Laboratories; MOS devices; Random access memory; Read-write memory;
Conference_Titel :
VLSI Circuits, 2004. Digest of Technical Papers. 2004 Symposium on
Print_ISBN :
0-7803-8287-0
DOI :
10.1109/VLSIC.2004.1346590