Title :
A VLSI-architecture for fast wavelet computations
Author :
Sauer, Matthias ; Götze, Jürgen
Author_Institution :
Inst. for Network Theory & Circuit Design, Tech. Univ., Munich, Germany
Abstract :
A VLSI architecture for fast wavelet computations, i.e., for the construction of wavelet bases of arbitrary order and for the fast wavelet transform (FWT) using this basis, is presented. For the construction of the wavelet bases, an algebraic approach requiring only orthogonal matrix decompositions of the moment matrices and matrix-matrix multiplications is used. The FWT is executed on a dyadic tree of shuffle-like interconnections between the computational stages. These types of computation can be executed on a linear array of processors containing only adders and multipliers supported by a permutation network suited to VLSI and functioning as a shared memory
Keywords :
VLSI; digital arithmetic; matrix algebra; VLSI architecture; adders; algebra; computational stages; dyadic tree; fast wavelet computations; fast wavelet transform; linear array; matrix-matrix multiplications; moment matrices; multipliers; orthogonal matrix decompositions; permutation network; processors; shared memory; shuffle-like interconnections; wavelet bases; Circuit synthesis; Computer architecture; Computer networks; Electronic mail; Fast Fourier transforms; Hardware; Matrix decomposition; Signal processing; Wavelet analysis; Wavelet transforms;
Conference_Titel :
Time-Frequency and Time-Scale Analysis, 1992., Proceedings of the IEEE-SP International Symposium
Conference_Location :
Victoria, BC
Print_ISBN :
0-7803-0805-0
DOI :
10.1109/TFTSA.1992.274131
