Title :
STEED-a testability enhancement expert design system
Author :
Koehler, Duane A. ; Somani, Arun K.
Abstract :
A description is given of STEED (testability enhancement expert design system) which has been built to perform testability analysis and design rule checking on circuit board designs at an avionics firm. STEED is able to identify correctly several common circuit features which make a circuit untestable (or are bad design practice). STEED provides a measure of `expert´ advice at a low time and effort overhead to the design engineer. It automates the testability design process and helps to ensure that a circuit meets the testability design rules
Keywords :
aircraft instrumentation; circuit layout CAD; expert systems; printed circuit testing; CAD; PCB design; STEED; aircraft instrumentation; avionics; circuit board designs; design rule checking; inference engine; testability analysis; testability enhancement expert design system; Aerospace electronics; Automatic testing; Circuit testing; Design engineering; Performance analysis; Performance evaluation; Printed circuits; Process design; System testing; Time measurement;
Conference_Titel :
Test Conference, 1989. Proceedings. Meeting the Tests of Time., International
Conference_Location :
Washington, DC
DOI :
10.1109/TEST.1989.82398
