Detection of transient faults in microprocessors by concurrent monitoring

Summary form only given. A novel approach, called concurrent processor monitoring for on-line detection of transient faults, that attempts to achieve high error coverage with small error detection latency is proposed. The concept of the execution profile of an instruction is defined and is used for detecting control flow and execution errors. To implement this scheme, a watchdog processor is designed for monitoring operation of the main processor. The effectiveness of this technique is demonstrated through computer simulations. Simulation studies on an 8086-based system indicate a fault coverage of 97% and a very small fault latency time. The hardware overhead for the watchdog processor is about 28%. By use of the basic design concept, test hardware could be implemented directly on the microprocessor chip and the hardware cost would be further reduced