Design and analysis of symmetric dual-layer spiral inductors for RF integrated circuits

Author

Lee, Sang-Gug ; Ihm, Gook-Ju ; Song, Won-Chul

Author_Institution

Sch. of Eng, Information & Commun. Univ., Taejon, South Korea

fYear

1999

fDate

6/21/1905 12:00:00 AM

Firstpage

5

Lastpage

8

Abstract

An area efficient and symmetric dual-layer spiral inductor structure is proposed and evaluated in comparison with the conventional single-layer spiral inductors. Measurements show that, for a given silicon area, the dual-layer inductor provides nearly 4 time the inductance of the single-layer inductor, while the quality factor is up to 2 times higher. For the same amount of inductance the dual-layer inductors show comparable to higher quality factor depends on frequency of operation. This paper demonstrates that, contrary to the common understanding the dual-layer can be more useful for the RF integrated circuits than the conventional single-layered spiral inductors from the aspects of area efficiency and quality factor The proposed dual-layer inductor can also be used as a high-frequency choke

Keywords

CMOS integrated circuits; Q-factor; UHF integrated circuits; inductors; integrated circuit design; 0.35 micron; CMOS process; HF choke; RF integrated circuits; RFIC; area efficiency; high-frequency choke; monolithic inductors; quality factor; symmetric dual-layer spiral inductors; Costs; Inductors; Integrated circuit noise; Integrated circuit technology; Laboratories; Q factor; Radio frequency; Radiofrequency integrated circuits; Silicon; Spirals;

fLanguage

English

Publisher

ieee

Conference_Titel

ASICs, 1999. AP-ASIC '99. The First IEEE Asia Pacific Conference on

Conference_Location

Seoul

Print_ISBN

0-7803-5705-1

Type

conf

DOI

10.1109/APASIC.1999.824011

Filename

824011