Title :
Electro Static Discharge (ESD) one real life event: Physical impact and protection challenges in advanced CMOS technologies
Author_Institution :
STMicroelectron., Crolles, France
Abstract :
The main purpose of this paper is to give an overview of Electro-Static Discharge (ESD) event with its impacts on advanced CMOS technologies. Afterwards, a discussion will be on ESD elementary devices and how to provide an efficient ESD network protection for System On Chip (SOC). These solutions are obtained according to the ESD window of the planar technology on bulk or Fully Depleted (FD) SOI. Thus it will be possible to imagine what could be the next challenges for an ESD protection.
Keywords :
CMOS digital integrated circuits; electrostatic discharge; silicon-on-insulator; system-on-chip; ESD elementary devices; SoC; advanced CMOS technologies; bulk depleted SOI; electrostatic discharge event; fully depleted silicon-on-insulator; network protection; planar technology; system on chip; Clamps; Electrostatic discharges; IP networks; Stress; System-on-chip; Thyristors; Transistors; BIMOS transistor; Bulk; CMOS; ESD; FA; FDSOI; GGNMOS; SCR; Triac; checker; diode;
Conference_Titel :
Semiconductor Conference (CAS), 2014 International
Conference_Location :
Sinaia
Print_ISBN :
978-1-4799-3916-9
DOI :
10.1109/SMICND.2014.6966382
