DocumentCode :
1640229
Title :
A 1.8 V self-biased complementary folded cascode amplifier
Author :
Song, B.G. ; Kwon, O.J. ; Chang, I.K. ; Song, H.J. ; Kwack, K.D.
Author_Institution :
Dept. of Electron. Eng., Hanyang Univ., Seoul, South Korea
fYear :
1999
fDate :
6/21/1905 12:00:00 AM
Firstpage :
63
Lastpage :
65
Abstract :
This paper describes a 1.8 V self-biased complementary folded cascode(SB-CFC) amplifier. We propose a new self biasing scheme for the folded cascode amplifier which eliminates 6 external bias voltages and related biasing circuits. The required minimum power supply voltage is reduced to 1.8 V and the output voltage swings are increased. With our new self-biasing scheme the area and power overhead, susceptibility of the bias lines to noise and crosstalk, and design time are reduced
Keywords :
CMOS analogue integrated circuits; differential amplifiers; low-power electronics; operational amplifiers; wideband amplifiers; 1.8 V; CMOS op amp; bias lines; complementary folded cascode amplifier; crosstalk; self biasing scheme; wideband opamp; Broadband amplifiers; CMOS technology; Circuits; Crosstalk; Mirrors; Operational amplifiers; Power supplies; Rails; Semiconductor device noise; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASICs, 1999. AP-ASIC '99. The First IEEE Asia Pacific Conference on
Conference_Location :
Seoul
Print_ISBN :
0-7803-5705-1
Type :
conf
DOI :
10.1109/APASIC.1999.824030
Filename :
824030
Link To Document :
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