A frame-based symbol timing recovery for large pull-in range and small steady state variation

Author

Su, Chauchin ; Huang, Lee-Yuang ; Lee, Jin-Jyh ; Wang, Churng-Kuang

Author_Institution

Dept. of Electr. Eng., Nat. Central Univ., Chung-Li, Taiwan

fYear

1999

fDate

6/21/1905 12:00:00 AM

Firstpage

75

Lastpage

78

Abstract

A novel approach is presented to detect and compensate large symbol frequency error accurately such that the timing recovery circuit can be optimized for very small steady state variation. It has been designed and implemented for a ATSC digital TV system. The measured results show that the proposed method is able to handle a symbol frequency error of 375 ppm and achieve a steady state variation of 12.6 ppm

Keywords

CMOS integrated circuits; digital television; error compensation; high definition television; mixed analogue-digital integrated circuits; synchronisation; television receivers; timing circuits; ATSC digital TV system; frame-based symbol timing recovery; large pull-in range; large symbol frequency error; steady state variation; timing recovery circuit optimization; Circuit testing; Detectors; Digital TV; Frequency; HDTV; Phase detection; Sampling methods; Steady-state; Timing; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

ASICs, 1999. AP-ASIC '99. The First IEEE Asia Pacific Conference on

Conference_Location

Seoul

Print_ISBN

0-7803-5705-1

Type

conf

DOI

10.1109/APASIC.1999.824032

Filename

824032