DocumentCode
1640450
Title
Accurate subcircuit model of an on-chip inductor with a new substrate network
Author
Fujishima, Minoru ; Kino, Jun
Author_Institution
Sch. of Frontier Sci., Univ. of Tokyo, Chiba, Japan
fYear
2004
Firstpage
376
Lastpage
379
Abstract
The accurate modeling of an on-chip inductor is required to achieve high speed, low power, and low noise in radio-frequency integrated circuits. However, the conventional inductor model has a measurable discrepancy in practice since the current flowing in a substrate is not correctly considered. In this paper, an accurate subcircuit model is proposed for an on-chip inductor with a new substrate network to consider losses generated in both vertical and horizontal directions. The proposed model gives an intelligent explanation of the reduction in equivalent resistance between terminals with increasing frequency. The simulation results show good agreement with the measurement over self-resonance frequency using the proposed inductor model.
Keywords
CMOS integrated circuits; integrated circuit modelling; integrated circuit noise; power consumption; radiofrequency integrated circuits; accurate subcircuit model; high speed; low noise; low power; on-chip inductor; radio-frequency integrated circuits; self-resonance frequency; substrate network; Eddy currents; Frequency; Inductors; Integrated circuit measurements; Network-on-a-chip; Proximity effect; Radiofrequency integrated circuits; Skin; Substrates; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits, 2004. Digest of Technical Papers. 2004 Symposium on
Print_ISBN
0-7803-8287-0
Type
conf
DOI
10.1109/VLSIC.2004.1346620
Filename
1346620
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