Title :
A 16Gb/s adaptive bandwidth on-chip bus based on hybrid current/voltage mode signaling
Author :
Bashirullah, Rizwan ; Liu, Wentai ; Cavin, Ralph ; Edwards, Dale
Author_Institution :
Dept. of Electr. & Comput. Eng., North Carolina State Univ., Raleigh, NC, USA
Abstract :
An adaptive bandwidth bus (ABB) uses both current and voltage sensing techniques to improve interconnection delay and signaling bandwidth compared to conventional static busses. Attaining a maximum aggregate bandwidth of 16Gb/s (i.e. 1Gb/s per line) across lossy on-chip interconnects spanning 1.75cm in length, the bus core fabricated in TSMC 0.35 μm CMOS technology dissipates approximately 93mW with a supply of 2.5V and signal activity of 0.5. Experimental results indicate a reduction in power of 50% over current-mode (CM) sensing, and an improvement in interconnection delay and signaling bandwidth of 35%-70% and 66% over voltage-mode (VM) sensing, respectively.
Keywords :
CMOS digital integrated circuits; adaptive systems; system-on-chip; telecommunication signalling; 0.35 μm CMOS technology; 0.35 micron; 1.75 cm; 16Gb/s adaptive bandwidth on-chip bus; 2.5 V; 93 mW; current sensing techniques; hybrid current/voltage mode signaling; interconnection delay; lossy on-chip interconnects; maximum aggregate bandwidth; signaling bandwidth; voltage sensing techniques; Bandwidth; CMOS technology; Delay; Detectors; Impedance; Pipelines; Power dissipation; Repeaters; Virtual manufacturing; Voltage;
Conference_Titel :
VLSI Circuits, 2004. Digest of Technical Papers. 2004 Symposium on
Print_ISBN :
0-7803-8287-0
DOI :
10.1109/VLSIC.2004.1346626
