Title :
Efficiency considerations for constraint generation in a symbolic compactor
Author_Institution :
Dept. of Comput. Sci., Memorial Univ. of Newfoundland, St. John´´s, Nfld., Canada
Abstract :
The design of a hybrid compactor based on the virtual grid and constraint graph approaches with particular attention to the constraint generation phase is discussed. Three approaches that determine which layout symbols must be compared in the constraint generation phase are examined. The efficiency and simplicity of each method is discussed. Net list extraction is avoided by use of a shield in the spacing calculations. Some performance results are presented
Keywords :
circuit layout CAD; graph theory; constraint generation phase; constraint graph approaches; hybrid compactor design; layout symbols; method efficiency; method simplicity; performance results; spacing calculation shield; symbolic compactor; virtual grid approach; Compaction; Computer science; Hybrid power systems; Inverters; Joining processes; Mesh generation; Timing; Wires;
Conference_Titel :
Circuits and Systems, 1989., IEEE International Symposium on
Conference_Location :
Portland, OR
DOI :
10.1109/ISCAS.1989.100501
