DocumentCode
1640832
Title
66 M/70 mW HS and ultra-low power 16×16 MAC design using TG for web-based multimedia system
Author
Seung-Min Lee ; Chung, Jin-Hong ; Yoon, Hyung-Seok ; Lee, Mike Myung-Ok Jin-Hong Chung
Author_Institution
Dept. of Inf. & Commun. Eng., Dongshin Univ., Chonnam, South Korea
fYear
1999
fDate
6/21/1905 12:00:00 AM
Firstpage
151
Lastpage
153
Abstract
In this paper a study has been presented on high speed (HS) and 79 mW low power (LP) 16×16 MAC performance of XOR-based circuits using transmission gate logic (TG) implemented on 0.6 um CMOS DLP/DLM technology. It is shown that our proposed MAC results in better performance than other published MACs due to no DC leakage currents for low power and bypassing unnecessary switching activities with latches before and after the multiplier for high speed
Keywords
CMOS logic circuits; digital arithmetic; multimedia communication; multiplying circuits; 0.6 micron; 79 mW; CMOS DLP/DLM technology; XOR-based circuits; multiplier-accumulator macro; switching activities; transmission gate logic; ultra-low power MAC design; web-based multimedia system; Adders; Application software; Circuits; Digital signal processing; Hardware design languages; Image processing; MOSFETs; Multimedia systems; Real time systems; Signal processing algorithms;
fLanguage
English
Publisher
ieee
Conference_Titel
ASICs, 1999. AP-ASIC '99. The First IEEE Asia Pacific Conference on
Conference_Location
Seoul
Print_ISBN
0-7803-5705-1
Type
conf
DOI
10.1109/APASIC.1999.824050
Filename
824050
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