Title :
A 50% power reduction scheme for CMOS relaxation oscillator
Author :
Song, ByungJoon ; Kim, Hwicheol ; Choi, Youngdon ; Kim, Wonchan
Author_Institution :
Sch. of Electr. Eng., Seoul Nat. Univ., South Korea
fDate :
6/21/1905 12:00:00 AM
Abstract :
In this paper, a CMOS relaxation oscillator is presented. The proposed oscillator has only one tail current source unlike the emitter coupled multivibrator. All the tail current flows through the timing capacitor and thus the charging slope of the timing capacitor is doubled. This enhances the operating speed without increasing the power consumption. The oscillator is fabricated in a standard 0.8 μm CMOS process. The maximum operating frequency is 923 MHz at a 3.3 V single supply, while the oscillator draws 6 mA
Keywords :
CMOS analogue integrated circuits; UHF integrated circuits; UHF oscillators; low-power electronics; relaxation oscillators; 0.8 micron; 3.3 V; 6 mA; 923 MHz; CMOS relaxation oscillator; charging slope; maximum operating frequency; operating speed; power reduction scheme; tail current source; timing capacitor; CMOS process; Capacitors; Circuits; Energy consumption; Frequency; Oscillators; Tail; Timing; Virtual manufacturing; Voltage;
Conference_Titel :
ASICs, 1999. AP-ASIC '99. The First IEEE Asia Pacific Conference on
Conference_Location :
Seoul
Print_ISBN :
0-7803-5705-1
DOI :
10.1109/APASIC.1999.824051
