DocumentCode
1640902
Title
An analytic threshold voltage model for the double-gate Schottky-Barrier source/drain MOSFETs
Author
Li, Peicheng ; Hu, Guangxi ; Mei, Guanghui ; Liu, Ran ; Jiang, Yi ; Tang, Tingao
Author_Institution
ASIC & Syst. State Key Lab., Fudan Univ., Shanghai, China
fYear
2010
Firstpage
1922
Lastpage
1924
Abstract
The threshold voltage, Vth of a double-gate Schottky-Barrier (DGSB) source/drain (S/D) metal-oxide-semiconductor field-effect transistor (MOSFET) has been investigated. An analytic expression for surface potential in the channel is obtained and the results are verified via simulations, good agreement is observed. A new definition for Vth is given, and an analytic expression for Vth is presented. We find that when the silicon thickness, tsi is small (<;3 nm), Vth is very sensitive to it. Vth increases dramatically with the decreasing of tsi. Vth also increases with the increasing of the oxide thickness, and with the decreasing of the drain-source voltage. These results can be of great help to the ultralarge-scale integrated-circuit (ULSI) designers.
Keywords
MOSFET; Schottky barriers; Schottky gate field effect transistors; ULSI; semiconductor device models; surface potential; ULSI design; analytic threshold voltage model; double-gate Schottky-barrier source/drain MOSFET; drain-source voltage; metal-oxide-semiconductor field-effect transistor; silicon thickness; surface potential; ultralarge-scale integrated-circuit; Analytical models; Electric potential; Logic gates; MOSFETs; Silicon; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology (ICSICT), 2010 10th IEEE International Conference on
Conference_Location
Shanghai
Print_ISBN
978-1-4244-5797-7
Type
conf
DOI
10.1109/ICSICT.2010.5667786
Filename
5667786
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