DocumentCode :
1642092
Title :
New scan design of asynchronous sequential circuits
Author :
Kang, Yong-Seok ; Huh, Kyung-Hoi ; Kang, Sungho
Author_Institution :
Dept. of Electr. Eng., Yonsei Univ., Seoul, South Korea
fYear :
1999
fDate :
6/21/1905 12:00:00 AM
Firstpage :
355
Lastpage :
358
Abstract :
In this paper a new scan design for detection of stuck-at faults and delay faults in asynchronous sequential circuits based on the micropipeline approach is proposed. This new scan methodology can gain the high fault coverage of path delay fault as well as stuck-at fault with the small area overhead in the asynchronous micropipeline environments and easily expand the application such as built-in self testing
Keywords :
VLSI; asynchronous circuits; built-in self test; delays; fault diagnosis; logic CAD; sequential circuits; area overhead; asynchronous sequential circuits; built-in self testing; delay faults; fault coverage; micropipeline environments; path delay fault; scan design; stuck-at faults; Asynchronous circuits; Automatic testing; Circuit faults; Circuit testing; Delay; Electrical fault detection; Hazards; Sequential circuits; Very large scale integration; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASICs, 1999. AP-ASIC '99. The First IEEE Asia Pacific Conference on
Conference_Location :
Seoul
Print_ISBN :
0-7803-5705-1
Type :
conf
DOI :
10.1109/APASIC.1999.824102
Filename :
824102
Link To Document :
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