Prevention of voids during the underfill process

This paper reports the void control in underfill process. In a flip chip package, there is void free as an important factor which acquires the stable reliability. We investigated the method of controlling void generation by the various technique. Conventionally, although importance was attached to pre-baking of a substrate, pre-heat in front of underfill process was effective. Moreover, the leaving time of before curing from after an application was also one method to control of void generation. We propose that control of void generation is possible by combining some techniques.