The scaling properties of CHISEL and CHE injection efficiency in MOSFETs and flash memory cells

Author

Esseni, D. ; Selmi, L. ; Ghetti, A. ; Sangiorgi, E.

Author_Institution

DIEGM, Udine, Italy

fYear

1999

Firstpage

275

Lastpage

278

Abstract

This paper addresses issues related to the scaling of the substrate enhanced gate current in MOSFETs. As a first step, a Monte Carlo model of the phenomenon based on the impact ionization feedback mechanism has been implemented and thoroughly verified. Then, by comparing model predictions with measurements on advanced devices for NVM applications, we identify the scaling laws of the injection efficiency in the conventional Channel Hot Electron regime (CHE) and in the substrate enhanced one. The results demonstrate that the improvement of injection efficiency induced by the substrate voltage becomes smaller as the gate length is reduced in a given technology. This feature is physically explained and its implications on device architecture and applications are discussed.

Keywords

MOSFET; Monte Carlo methods; charge injection; flash memories; hot carriers; impact ionisation; semiconductor device models; CHE injection efficiency; CHISEL injection efficiency; MOSFET; Monte Carlo model; channel hot electron injection; channel initiated secondary electron injection; flash memory; impact ionization feedback; nonvolatile memory; scaling properties; substrate enhanced gate current; Channel hot electron injection; Charge carrier processes; Feedback; Flash memory cells; Impact ionization; MOSFETs; Monte Carlo methods; Nonvolatile memory; Substrate hot electron injection; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1999. IEDM '99. Technical Digest. International

Conference_Location

Washington, DC, USA

Print_ISBN

0-7803-5410-9

Type

conf

DOI

10.1109/IEDM.1999.824150

Filename

824150