Impact of layout and technology parameters on the thermal resistance of SiGe:C HBTs

Author

d´Alessandro, V. ; Marano, I. ; Russo, S. ; Céli, D. ; Chantre, A. ; Chevalier, P. ; Pourchon, F. ; Rinaldi, N.

Author_Institution

Dept. of Biomed., Electron., & Telecommun. Eng., Univ. of Naples Federico II, Naples, Italy

fYear

2010

Firstpage

137

Lastpage

140

Abstract

Calibrated 3-D numerical simulations supported by DC experimental data are employed to quantify the impact of the key layout and technology parameters on the thermal resistance of state-of-the-art SiGe heterojunction bipolar transistors (HBTs) so as to define proper optimization criteria. The geometry parameters of a simple scalable model are optimized to describe the thermal resistance dependence upon emitter dimensions for the HBTs under analysis.

Keywords

Ge-Si alloys; heterojunction bipolar transistors; integrated circuit layout; thermal resistance; DC experimental data; SiGe:C; calibrated 3D numerical simulation; emitter dimension; geometry parameter; heterojunction bipolar transistor; layout impact; optimization criteria; technology parameter; thermal resistance; Finite element methods; Heating; Silicon; Silicon germanium; Thermal analysis; Thermal resistance; Numerical simulations; SiGe HBTs; self-heating; thermal resistance;

fLanguage

English

Publisher

ieee

Conference_Titel

Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), 2010 IEEE

Conference_Location

Austin, TX

ISSN

1088-9299

Print_ISBN

978-1-4244-8578-9

Type

conf

DOI

10.1109/BIPOL.2010.5667912

Filename

5667912