Title :
The design of ideal diode
Author :
Ma, Dabing ; Xin, Jianli
Author_Institution :
Dept. of Electron. Eng., Xiamen Univ., Xiamen, China
Abstract :
This article describes a P-channel MOSFET ideal diode circuit. The P-channel MOSFET on-resistance that connects the input and output is only 100mΩ in the circuit. In order to ensure the drop voltage from the input to the output is equal to V1(when I1 = 2A, V1 = 256mV), the circuit uses a high-gain amplifier to adjust the gate voltage of the P-channel MOS transistor(MP0). And the circuit also uses a high side current sensing comparator to limit the current that flows through the P-channel MOSFET. The maximum forward current achieves 2A, and the maximum reverse leakage current is 2μA. Simulation results using a 0.5μm BCD process are presented and discussed.
Keywords :
MOSFET; P-channel MOS transistor; P-channel MOSFET ideal diode circuit; P-channel MOSFET on-resistance; current 2 A; current 2 muA; high side current sensing comparator; ideal diode design; resistance 100 mohm; Hysteresis; Logic gates; MOSFET circuits; Mirrors; Power dissipation; Schottky diodes; Voltage control; cascode differential pair; ideal diode; limiting current;
Conference_Titel :
Anti-Counterfeiting, Security and Identification (ASID), 2012 International Conference on
Conference_Location :
Taipei
Print_ISBN :
978-1-4673-2144-0
Electronic_ISBN :
2163-5048
DOI :
10.1109/ICASID.2012.6325307
