High-performance CMOS-based VLSI testers: timing control and compensation

To take advantage of the low cost and high integration levels of CMOS VLSI for use as the core technology of a VLSI tester, the propagation delay sensitivities of CMOS circuitry to temperature and voltage variation must be understood. In addition, feedback systems need to be created to compensate for these changes. This paper covers thermal modelling techniques for an integrated tester chip, and describes several feedback system techniques for addressing these delay sensitivities. After a proper feedback system is in place, CMOS becomes an excellent platform for building a high-performance VLSI testing system.