Advanced interconnect schemes towards 0.1 /spl mu/m

As design rules drop below 200 nm, a variety of problems emerges such as RC delay, electromigration resistance and heat dissipation exacerbated by increasing chip power. The use of copper should solve resistivity and electromigration problems but the reliability issue with respect to an efficient diffusion barrier is a concern. Low k dielectrics allowing capacitance reduction have low thermal conductivity and thus poor heat dissipation capability. Integration of copper and low k dielectrics in a damascene architecture are under intensive study world wide. This paper gives an overview of the international state of the art to overcome critical issues of advanced interconnects.