Title :
Design verification of a high density computer using IEEE 1149.1
Author :
Daniel, Wayne T.
Abstract :
This paper discusses the use of the IEEE 1149.1 test bus, internal scan and built-in emulation logic in the design verification and system integration of an embedded 100Mhz high density scalarlvector parallel processing computer.
Keywords :
Application specific integrated circuits; Concurrent computing; Embedded computing; Emulation; Logic design; Logic devices; Logic testing; Military computing; Software testing; System testing;
Conference_Titel :
Test Conference, 1992. Proceedings., International
Conference_Location :
Baltimore, MD
Print_ISBN :
0-7803-0760-7
DOI :
10.1109/TEST.1992.527807
