Title :
A low-power programmable DLL-based clock generator with wide-range anti-harmonic lock
Author :
Kim, Yongtae ; Pham, Phi-Hung ; Heo, Woonhyung ; Koo, Jabeom
Author_Institution :
Dept. of Electr. & Comput. Eng., Texas A&M, College Station, TX, USA
Abstract :
A delay-locked loop (DLL)-based clock generator for dynamic frequency scaling has been developed in a 0.13um CMOS technology. The proposed clock generator can generate a wide-range of the multiplied clock signals ranging from 125MHz to 2GHz. In addition, thanks to the proposed anti-harmonic lock block, the clock generator can change the frequency dynamically in one cycle time of the reference clock. The proposed DLL-based clock generator occupies 0.019mm2 and consumes 21mW at 2GHz. The ratio of power consumption to frequency of the proposed clock generator is smaller than those of conventional ones.
Keywords :
CMOS integrated circuits; clocks; delay lock loops; low-power electronics; power consumption; CMOS technology; clock generator; delay locked loop; dynamic frequency scaling; frequency 125 MHz to 2 GHz; low-power programmable DLL; power 21 mW; power consumption; size 0.13 mum; wide-range anti-harmonic lock; CMOS technology; Clocks; Delay; Detectors; Energy consumption; Frequency; Jitter; Power generation; Signal generators; Voltage control; Anti-harmonic lock; Frequency multiplier;
Conference_Titel :
SoC Design Conference (ISOCC), 2009 International
Conference_Location :
Busan
Print_ISBN :
978-1-4244-5034-3
Electronic_ISBN :
978-1-4244-5035-0
DOI :
10.1109/SOCDC.2009.5423833
