DocumentCode :
1645180
Title :
Design of area-efficient unified transform circuit for multi-standard video decoder
Author :
Chang, Hoyoung ; Kim, Soojin ; Lee, Seonyoung ; Cho, Kyeongsoon
Author_Institution :
Dept. of Electron. & Inf. Eng., Hankuk Univ. of Foreign Studies, Yongin, South Korea
fYear :
2009
Firstpage :
369
Lastpage :
372
Abstract :
This paper proposes a method to perform the inverse transform operations for three popular video compression standards H.264, VC-1 and MPEG-4 using the concept of delta coefficent matrix. We designed the unified inverse transform circuit based on the proposed method. Our circuit supports 4-point and 8-point transforms for H.264, VC-1 and MPEG-4. The proposed unified circuit was verified on the SoC platform board synthesized into a gate-level circuit using 130 nm standard cell library and showed its efficiency in terms of the area.
Keywords :
data compression; system-on-chip; video codecs; video coding; 4-point transforms; 8-point transforms; H.264; MPEG-4; SoC; VC-1; area-efficient unified transform circuit; delta coefficent matrix; gate-level circuit; inverse transform circuit; multi-standard video decoder; size 130 nm; standard cell library; video compression standards; Circuits; Decoding; Quadratic programming; circuit architecture; multi-standard; unified transform; video decoder;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SoC Design Conference (ISOCC), 2009 International
Conference_Location :
Busan
Print_ISBN :
978-1-4244-5034-3
Electronic_ISBN :
978-1-4244-5035-0
Type :
conf
DOI :
10.1109/SOCDC.2009.5423842
Filename :
5423842
Link To Document :
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