DocumentCode
1645211
Title
Implementation of H.264 Fractional Motion Estimation using full search algorithm
Author
Ahn, Jingyu ; Song, Sehyun ; Kim, Kichul
Author_Institution
Sch. of Electr. & Comput. Eng., Univ. of Seoul, Seoul, South Korea
fYear
2009
Firstpage
357
Lastpage
360
Abstract
This paper proposes a Fractional Motion Estimation(FME) unit for H.264/AVC video codec standard. The proposed FME unit uses full-search algorithm. The FME unit consists of interpolation unit, comparator unit, metadata processing unit, Current Block(CB) buffer, and Reference Block(RB) SRAM address generator. The FME unit processes 30 QCIF frames in a second at 150MHz. The FME unit is a part of Motion Estimation(ME) unit. ME unit uses 2 stage pipeline. One is Integer Motion Estimation(IME) unit and the other is FME unit. The IME and FME unit share RB SRAM. It takes about 3000~9000 cycles for IME unit to process one MacroBlock(MB) and about 2500 cycle for FME unit to process one MB. There is no bubble in ME pipeline architecture.
Keywords
motion estimation; video codecs; video coding; AVC video codec standard; H.264 fractional motion estimation; comparator unit; current block buffer; full search algorithm; interpolation unit; metadata processing unit; reference block SRAM address generator; Automatic voltage control; Hardware; IEC standards; ISO standards; Interpolation; Motion estimation; Nonlinear filters; Pipelines; Random access memory; Video coding; FME; H.264/AVC; Motion Estimation;
fLanguage
English
Publisher
ieee
Conference_Titel
SoC Design Conference (ISOCC), 2009 International
Conference_Location
Busan
Print_ISBN
978-1-4244-5034-3
Electronic_ISBN
978-1-4244-5035-0
Type
conf
DOI
10.1109/SOCDC.2009.5423843
Filename
5423843
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