A 1-V 2.4-GHz PLL synthesizer with a fully differential prescaler and a low-off-leakage charge pump

Author

Yamagishi, A. ; Ugajin, M. ; Tsukahara, T.

Author_Institution

NTT Microsystem Integration Labs., Atsugi, Japan

Volume

2

fYear

2003

Firstpage

733

Abstract

A 1 V 2.4 GHz-band fully monolithic PLL synthesizer was fabricated using 0.2 /spl mu/m CMOS/SOI process technology. It includes a voltage controlled oscillator (VCO) and a 3 GHz fully differential dual-modulus prescaler on a chip. A low-off-leakage-current charge pump is used for open-loop FSK modulation. When the PLL is in open loop mode, the frequency drift of the output is lower than 2.5 Hz//spl mu/sec. The output phase noise is -104 dBc/Hz at 1 MHz offset frequency. The power consumption of the PLL-IC core is 17 mW at 1 V supply voltage.

Keywords

CMOS integrated circuits; UHF integrated circuits; frequency shift keying; frequency synthesizers; integrated circuit design; integrated circuit measurement; integrated circuit noise; leakage currents; phase locked loops; phase noise; prescalers; silicon-on-insulator; voltage-controlled oscillators; 0.2 micron; 1 V; 17 mW; 2.4 GHz; 3 GHz; CMOS/SOI UHF PLL synthesizers; PLL open loop mode; Si-SiO/sub 2/; VCO; fully differential dual-modulus prescalers; low-off-leakage-current charge pumps; offset frequency output phase noise; open-loop FSK modulation; output frequency drift; phase locked loops; voltage controlled oscillators; CMOS process; CMOS technology; Charge pumps; Energy consumption; Frequency locked loops; Frequency shift keying; Phase locked loops; Phase noise; Synthesizers; Voltage-controlled oscillators;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Symposium Digest, 2003 IEEE MTT-S International

Conference_Location

Philadelphia, PA, USA

ISSN

0149-645X

Print_ISBN

0-7803-7695-1

Type

conf

DOI

10.1109/MWSYM.2003.1212476

Filename

1212476