DocumentCode :
1645344
Title :
Low voltage tunneling in ultra-thin oxides: a monitor for interface states and degradation
Author :
Ghetti, A. ; Sangiorgi, E. ; Bude, J. ; Sorsch, T.W. ; Weber, G.
Author_Institution :
Bell Lab., Lucent Technol., Murray Hill, NJ, USA
fYear :
1999
Firstpage :
731
Lastpage :
734
Abstract :
In this paper we report data on NMOS devices with ultra thin oxide (t/sub ox/=2 nm) and heavily doped substrates, showing, for the first time, that the gate current, for very low biases (-|V/sub FB/|\n\n\t\t
Keywords :
MOSFET; heavily doped semiconductors; insulating thin films; semiconductor device reliability; tunnelling; 2 nm; NMOS devices; anode interface states; biases; gate current; gate electron tunneling; heavily doped substrates; oxide degradation; ultra-thin oxides; Anodes; Current measurement; Electrons; Interface states; Low voltage; MOS devices; Monitoring; State estimation; Stress measurement; Tunneling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1999. IEDM '99. Technical Digest. International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-5410-9
Type :
conf
DOI :
10.1109/IEDM.1999.824255
Filename :
824255
Link To Document :
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