Title :
Intelligent image sensor chip with three dimensional structure
Author :
Kurino, H. ; Lee, K.W. ; Nakamura, T. ; Sakuma, K. ; Park, K.T. ; Miyakawa, N. ; Shimazutsu, H. ; Kim, K.Y. ; Inamura, K. ; Koyanagi, M.
Author_Institution :
Dept. of Machine Intelligence & Syst. Eng., Tohoku Univ., Sendai, Japan
Abstract :
A new three-dimensional (3D) integration technology based on wafer bonding technique has been proposed for intelligent image sensor chip with 3D stacked structure. We have developed key technologies for such 3D integration. A 3D image sensor test chip was fabricated using this 3D integration technology. Basic electric characteristics were evaluated in the 3D image sensor test chip.
Keywords :
image sensors; integrated circuit testing; large scale integration; wafer bonding; 3D image sensor test chip; 3D integration; 3D integration technology; 3D stacked structure; LSI chip testing; basic electric characteristics; intelligent image sensor chip; key technologies; three dimensional structure; wafer bonding technique; Glass; Image processing; Image sensors; Integrated circuit interconnections; Intelligent sensors; Intelligent structures; Machine intelligence; Sensor arrays; Testing; Wafer bonding;
Conference_Titel :
Electron Devices Meeting, 1999. IEDM '99. Technical Digest. International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-5410-9
DOI :
10.1109/IEDM.1999.824289
