An SoC platform with on-chip web interface for in-field monitoring

As the VLSI technologies scale down to the nanometer regime, the circuit design and verification processes have become more and more complex and a reliable operation of VLSI becomes sensitive to the PVT (process, voltage, and temperature) variations. Therefore, the LSI test only before the shipment to screen out the initial failures has been insufficient to ensure the reliable in-field operation of LSI. In this paper, we propose an SoC platform with on-chip web interface to realize an in-field LSI testing and an easy access to the on-chip LSI monitoring circuits such as scan registers, temperature sensors, and so on. We can control the on-chip monitoring systems through the Web interface, and can monitor the LSI correct operations from remote locations using the proposed platform. Therefore, the proposed SoC platform realizes the LSI functionality monitoring even after the shipment and can test the in-field operation of LSI. This platform consists of 16-bit CPU, 64 K words of instruction/data memory, and 10Base-T Ethernet interface. A preliminary version of the proposed platform was implemented on 0.18 ¿m standard CMOS process. The area overhead is 8.44 mm² on 0.18 ¿m process, and is estimated to scale down to about 1 mm² on 65 nm process.