Title :
IChecker: An Efficient Checker for Inductive Invariants
Author :
Lu, Feng ; Cheng, K.-T.
Author_Institution :
Dept. of ECE, California Univ., Santa Barbara, CA
Abstract :
Invariants in sequential circuits could be very useful for sequential optimizations and for speeding up functional verification tasks. However, the lack of efficient and scalable invariant identification tools limits their usage. In this paper, we present a new tool, IChecker, for efficient identification of true invariants for any given initial set of invariant candidates. ICheker uses new circuit simplification techniques to iteratively minimize constrained circuit models, along with a number of heuristics for efficient computation of invariants. Experimental results demonstrate the high efficiency and effectiveness of the proposed approach for identifying sequential invariants
Keywords :
circuit analysis computing; circuit optimisation; circuit testing; formal verification; sequential circuits; IChecker; circuit simplification; functional verification; inductive invariant checking; invariant identification tool; sequential circuit; sequential optimization; Circuit simulation; Circuit testing; Combinational circuits; Conferences; Engines; Flip-flops; Joining processes; Sequential circuits; Signal processing; State-space methods;
Conference_Titel :
High-Level Design Validation and Test Workshop, 2006. Eleventh Annual IEEE International
Conference_Location :
Monterey, CA
Print_ISBN :
1-4244-0680-3
Electronic_ISBN :
1552-6674
DOI :
10.1109/HLDVT.2006.319987