A simplified low voltage smart power technology

Author

Berta, F. ; Hidalgo, S. ; Godignon, P. ; Rebollo, J. ; Millan, J.

Author_Institution

Centro Nacional de Microelectron., Univ. Autonoma de Barcelona, Spain

fYear

1991

Firstpage

263

Abstract

A self-isolated smart power process using only eight photolithographic steps has been developed. It allows the fabrication of high-voltage VDMOS and p-channel MOS transistors, a low-voltage CMOS logic, n-p-n bipolar transistors, diodes, Zeners, and high value capacitors. The VDMOS device is fabricated by a double diffused process and the same diffusion is used for the n-channel transistor well and for the VDMOS body. A process monitor chip has been fabricated and the different devices have been measured, showing the feasibility of such a technology and the excellent agreement with previously obtained simulation results

Keywords

BIMOS integrated circuits; integrated circuit technology; power integrated circuits; BiCMOS; BiMOS IC; capacitors; double diffused process; fabrication; high-voltage VDMOS; low voltage; low-voltage CMOS logic; n-channel transistor well; n-p-n bipolar transistors; p-channel MOS transistors; photolithographic steps; process monitor chip; self-isolated smart power process; smart power technology; Bipolar transistors; CMOS logic circuits; CMOS technology; Diodes; Fabrication; Logic devices; Low voltage; MOS capacitors; MOSFETs; Monitoring;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrotechnical Conference, 1991. Proceedings., 6th Mediterranean

Conference_Location

LJubljana

Print_ISBN

0-87942-655-1

Type

conf

DOI

10.1109/MELCON.1991.161827

Filename

161827