Extracting a simplified view of design functionality via vector simulation

This paper presents a simulation-based methodology for extracting a simplified view of a design´s input-output behavior. Such a simplified design view can be used to facilitate test pattern justification from the outputs of the module to the inputs of the module. In this paper, extraction of a design simplification view is formulated as a learning problem. With a learning scheme for learning word-level functions, the core of the problem becomes developing an efficient Boolean learner. We discuss the implementation of such a Boolean learner and compare its performance with the one of best-known Boolean learning algorithms, the Fourier analysis based method. Experimental results are presented to illustrate the implementation of the simulation-based methodology and its usage for extracting a simplified functionality view from Open RISC 1200 datapath