Title :
High-Q RF inductors on standard silicon realized using wafer-level packaging techniques
Author :
Carchon, G. ; Jenei, S. ; Carbonell, L. ; Van Hove, M. ; Decoutere, S. ; De Raedt, W. ; Maex, K. ; Beyne, E.
Author_Institution :
IMEC, Heverlee, Belgium
Abstract :
Wafer level packaging (WLP) techniques have been used to integrate state of the art high Q on-chip inductors on top of a five-levels-of-metal (5LM) Cu damascene back-end of line (BEOL) silicon process using 20 /spl Omega/.cm Si wafers. The inductors are realized above passivation using thick post-processed low-K dielectric (BCB) and Cu layers. For a BCB/Cu-thickness of 16 /spl mu/m/10 /spl mu/m, a peak Q-factor of 34 at 4.3 GHz has been obtained for a 1 nH inductor (substrate contacts present at both ports) with a resonance frequency of 29 GHz; the Q-factor further tops 30 over the 2.1-5.4 GHz frequency range. If a substrate contact is present at only 1 port, Q/sub max/ increases to 38 at 4.7 GHz. Patterned polysilicon ground shields further improve this performance: a Q-factor increase of 90% is demonstrated at 7 GHz for a 2.25 nH inductor. A good agreement between measurements and 3-D simulations is demonstrated.
Keywords :
Q-factor; inductors; metallisation; packaging; passivation; 2.1 to 5.4 GHz; 29 GHz; 3D simulation; 7 GHz; BCB low-K dielectric; Cu; Cu damascene back-end of line silicon process; Q-factor; RF inductor; Si; passivation; polysilicon ground shield; resonance frequency; substrate contact; wafer-level packaging; Dielectric losses; Dielectric substrates; Metallization; Passivation; Q factor; Radio frequency; Silicon; Spirals; Thin film inductors; Wafer scale integration;
Conference_Titel :
Microwave Symposium Digest, 2003 IEEE MTT-S International
Conference_Location :
Philadelphia, PA, USA
Print_ISBN :
0-7803-7695-1
DOI :
10.1109/MWSYM.2003.1212605