DocumentCode
1648848
Title
High-Speed Redundant Modulo 2n-1 Adder
Author
Kharbash, F. ; Chaudhry, G.M.
fYear
2006
fDate
3/8/2006 12:00:00 AM
Firstpage
80
Lastpage
87
Keywords
Adders; Cities and towns; Computer science; Delay; Digital arithmetic; Digital signal processing; Equations; Error correction; Fault detection; Hardware;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Systems and Applications, 2006. IEEE International Conference on.
Print_ISBN
1-4244-0211-5
Type
conf
DOI
10.1109/AICCSA.2006.205071
Filename
1618336
Link To Document