• DocumentCode
    1648967
  • Title

    Novel Reversible Multiplier Architecture Using Reversible TSG Gate

  • Author

    Thapliyal, Himanshu ; Srinivas, M.B.

  • fYear
    2006
  • fDate
    3/8/2006 12:00:00 AM
  • Firstpage
    100
  • Lastpage
    103
  • Keywords
    Arithmetic; Boolean functions; CMOS logic circuits; CMOS technology; Computer architecture; Logic gates; Nanotechnology; Optical computing; Quantum computing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Systems and Applications, 2006. IEEE International Conference on.
  • Print_ISBN
    1-4244-0211-5
  • Type

    conf

  • DOI
    10.1109/AICCSA.2006.205074
  • Filename
    1618339
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1648967