Title :
Learning algorithms for a neural network in FPGA
Author :
Aoyama, Tomoo ; Wang, Qianyi ; Suematsu, Ryosuke ; Shimizu, Ryosuke ; Nagashima, Umpei
Author_Institution :
Fac. of Eng., Miyazaki Univ., Japan
fDate :
6/24/1905 12:00:00 AM
Abstract :
We researched simplified multi-layer neural networks to equip them in one-chip FPGA. We reexamined neuron functions, bits number of connection-weights, and learning methods; and proposed a "and/or"-neural network, which is derived from the disjunctive-normal-form in the binary logic; however it can be expanded to the multi-valued. We designed the network by using HDL
Keywords :
field programmable gate arrays; learning (artificial intelligence); multilayer perceptrons; AND/OR-neural network; HDL; binary logic; connection-weights; disjunctive-normal-form; learning algorithms; learning methods; multivalued logic; neural network; neuron functions; one-chip FPGA; simplified multilayer neural networks; Artificial neural networks; Computer industry; Extrapolation; Field programmable gate arrays; Intelligent networks; Learning systems; Multi-layer neural network; Neural networks; Neurons; Probability;
Conference_Titel :
Neural Networks, 2002. IJCNN '02. Proceedings of the 2002 International Joint Conference on
Conference_Location :
Honolulu, HI
Print_ISBN :
0-7803-7278-6
DOI :
10.1109/IJCNN.2002.1005613
