DocumentCode
1649736
Title
Serial multiplier architectures over GF(2n) for elliptic curve cryptosystems
Author
Batina, Lejla ; Mentens, Nele ; Örs, Siddika Bema ; Preneel, Bart
Author_Institution
ESAT/SCD-COSIC, Katholieke Univ., Leuven, Belgium
Volume
2
fYear
2004
Firstpage
779
Abstract
We present an FPGA implementation of a new multiplier for binary finite fields that combines two previously known methods. The multiplier is designed for polynomial bases which allow more flexibility in hardware and is dedicated to efficient implementations of elliptic curve cryptography. An extension to a digit-serial architecture is also sketched. For the introduced architecture we also discuss resistance to side-channel attacks.
Keywords
Galois fields; elliptic equations; field programmable gate arrays; multiplying circuits; public key cryptography; FPGA implementation; binary finite fields; digit-serial architecture; elliptic curve cryptography; field programmable gate arrays; serial multiplier architectures; side-channel attacks; Arithmetic; Clocks; Convolution; Elliptic curve cryptography; Elliptic curves; Field programmable gate arrays; Galois fields; Hardware; Polynomials; Public key cryptography;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrotechnical Conference, 2004. MELECON 2004. Proceedings of the 12th IEEE Mediterranean
Print_ISBN
0-7803-8271-4
Type
conf
DOI
10.1109/MELCON.2004.1347047
Filename
1347047
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