Trigate 6T SRAM scaling to 0.06 µm²

Author

Guillorna, M. ; Chang, J. ; Pyzyna, A. ; Engelmann, S. ; Joseph, E. ; Fletcher, B. ; Cabral, C. ; Lin, C.H. ; Bryant, A. ; Darnon, M. ; Ott, J. ; Lavoie, C. ; Frank, M. ; Gignac, L. ; Newbury, J. ; Wang, C. ; Klaus, D. ; Kratschmer, E. ; Bucchignano, J. ;

Author_Institution

IBM Res., IBM T.J. Watson Res. Center, Yorktown Heights, NY, USA

fYear

2009

Firstpage

1

Lastpage

3

Abstract

We present an aggressively scaled trigate device architecture with undoped channels, high-k gate dielectric, a single work function metal gate and novel BEOL processing yielding 6T SRAM bit cells as small as 0.06 μm². This is the smallest SRAM cell demonstrated to date and represents the first time an SRAM based on a multi-gate FET (MUGFET) architecture has surpassed SRAM density scaling demonstrated with planar devices.

Keywords

SRAM chips; field effect transistors; high-k dielectric thin films; BEOL processing; high-k gate dielectric; multigate FET architecture; planar devices; scaled trigate device architecture; single work function metal gate; trigate 6T SRAM scaling; Dielectric devices; Electrostatics; Implants; Optical films; Parasitic capacitance; Random access memory; Silicides; Silicon compounds; Tin; Wiring;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting (IEDM), 2009 IEEE International

Conference_Location

Baltimore, MD

Print_ISBN

978-1-4244-5639-0

Electronic_ISBN

978-1-4244-5640-6

Type

conf

DOI

10.1109/IEDM.2009.5424249

Filename

5424249

Trigate 6T SRAM scaling to 0.06 µm2

Guillorna, M. ; Chang, J. ; Pyzyna, A. ; Engelmann, S. ; Joseph, E. ; Fletcher, B. ; Cabral, C. ; Lin, C.H. ; Bryant, A. ; Darnon, M. ; Ott, J. ; Lavoie, C. ; Frank, M. ; Gignac, L. ; Newbury, J. ; Wang, C. ; Klaus, D. ; Kratschmer, E. ; Bucchignano, J. ;

conf

Trigate 6T SRAM scaling to 0.06 µm²