DocumentCode
1650016
Title
Low-Cost Duplicate Multiplication
Author
Sullivan, Michael B. ; Swartzlander, Earl E.
Author_Institution
Univ. of Texas at Austin, Austin, TX, USA
fYear
2015
Firstpage
2
Lastpage
9
Abstract
Rising levels of integration, decreasing component reliabilities, and the ubiquity of computer systems make error protection a rising concern. Meanwhile, the uncertainty of future fault and error modes motivates the design of strong error detection mechanisms that offer fault-agnostic error protection. Current concurrent hardware mechanisms, however, either offer strong error detection coverage at high cost or restrict their coverage to narrow synthetic error models. This paper investigates the potential for duplication using alternate number systems to lower the costs of duplicated multiplication without sacrificing error coverage. Two examples of such low-cost duplication schemes are described and evaluated, it is shown that specialized carry-save or residue number system checking can be used to increase the efficiency of duplicated multiplication.
Keywords
digital arithmetic; error detection; alternate number system; computer arithmetic; concurrent hardware mechanism; low-cost duplicate multiplication; low-cost error detection; residue number system checking; Boolean functions; Data structures; Digital arithmetic; Global Positioning System; Hafnium compounds; Universal Serial Bus; Computer Arithmetic; Concurrent Error Detection; Dual Modular Redundancy; Low-Cost Duplication; Low-Cost Error Detection; Self-testing and Self-checking Circuitry;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Arithmetic (ARITH), 2015 IEEE 22nd Symposium on
Conference_Location
Lyon
ISSN
1063-6889
Print_ISBN
978-1-4799-8663-7
Type
conf
DOI
10.1109/ARITH.2015.29
Filename
7203789
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