DocumentCode :
1650103
Title :
16nm functional 0.039µm2 6T-SRAM cell with nano injection lithography, nanowire channel, and full TiN gate
Author :
Chen, Hou-Yu ; Chen, Chun-Chi ; Hsueh, Fu-Kuo ; Liu, Jan-Tsai ; Shen, Chih-Yen ; Hsu, Chiung-Chih ; Shy, Shyi-Long ; Lin, Bih-Tiao ; Chuang, Hsi-Ta ; Wu, Cheng-San ; Hu, Chenming ; Huang, Chien-Chao ; Yang, Fu-Liang
Author_Institution :
Nat. Nano Device Labs., Hsinchu, Taiwan
fYear :
2009
Firstpage :
1
Lastpage :
3
Abstract :
Record area size of 0.039 μm2 for a functional 6T-SRAM cell has been successfully achieved with a novel Nano Injection Lithography (NIL) technique and dynamic Vdd regulator (DVR). The NIL technique is not only maskless for minimizing entry cost but also photoresist free to greatly enhance pattern resolution, down to 2 nm 3-sigma line width roughness, and without significant proximity effect. Devices with nanowire channels and full TiN single gate for both N- and P-MOS are demonstrated with short channel and simplified integration process. This work discloses a new way to explore 16 nm CMOS device and circuit design, and obtains early access to extreme CMOS scaling.
Keywords :
CMOS digital integrated circuits; SRAM chips; nanolithography; nanowires; proximity effect (lithography); voltage regulators; 3-sigma line width roughness; CMOS device; N-MOS; P-MOS; TiN; circuit design; dynamic Vdd regulator; full TiN gate; functional 6T-SRAM cell; nano injection lithography technique; nanowire channel; pattern resolution enhancement; photoresist; proximity effect; size 16 nm; Circuits; Lithography; Nanoscale devices; Platinum; Proximity effect; Random access memory; Regulators; Resists; Tin; Ultraviolet sources;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting (IEDM), 2009 IEEE International
Conference_Location :
Baltimore, MD
Print_ISBN :
978-1-4244-5639-0
Electronic_ISBN :
978-1-4244-5640-6
Type :
conf
DOI :
10.1109/IEDM.2009.5424252
Filename :
5424252
Link To Document :
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