DocumentCode
1650157
Title
High-performance low-memory interleaver banks for turbo-codes
Author
Crozier, Stewart ; Guinand, P.
Author_Institution
Commun. Res. Centre, Ottawa, Ont., Canada
Volume
4
fYear
2001
fDate
6/23/1905 12:00:00 AM
Firstpage
2394
Abstract
A new method of designing high-performance, low-memory, interleaver banks for turbo-codes is presented. The new interleavers are called dithered relative prime (DRP) interleavers. Only a small number of parameters are required to both store and implement each interleaver in the bank. The error rate performance is similar to that achieved by other good interleaver designs that typically require the storage of all K indexes for each interleaver of length K
Keywords
error correction codes; error statistics; interleaved codes; turbo codes; DRP interleavers; dithered relative prime interleavers; error correcting; error rate performance; high-performance interleaver banks; low-memory interleaver banks; turbo codes; Convolutional codes; Decoding; Design methodology; Electronic mail; Error analysis; Error correction codes; Feedback; Interleaved codes; Polynomials; Turbo codes;
fLanguage
English
Publisher
ieee
Conference_Titel
Vehicular Technology Conference, 2001. VTC 2001 Fall. IEEE VTS 54th
Conference_Location
Atlantic City, NJ
ISSN
1090-3038
Print_ISBN
0-7803-7005-8
Type
conf
DOI
10.1109/VTC.2001.957178
Filename
957178
Link To Document