• DocumentCode
    1650301
  • Title

    The impact of partially scaled metal barrier shunting on failure criteria for copper electromigration resistance increase in 65nm technology

  • Author

    Lee, Ki-Don ; Park, Young-Joon ; Hunter, Bill

  • Author_Institution
    Silicon Technol. Dev., Texas Instrum. Inc., Dallas, TX, USA
  • fYear
    2005
  • Firstpage
    31
  • Lastpage
    35
  • Keywords
    copper; electromigration; integrated circuit interconnections; integrated circuit reliability; voids (solid); 65 nm; Cu; EM activation energy; barrier layer current shunting; bi-modal distribution; dual-damascene interconnect current exponent; failure criteria; full span void formation; interconnect failure time; length direction void growth; partially scaled metal barrier shunting effects; resistance step; sloped electromigration resistance increase; Cathodes; Copper; Delay; Dielectrics; Electric resistance; Electromigration; Glass; Instruments; Silicon; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reliability Physics Symposium, 2005. Proceedings. 43rd Annual. 2005 IEEE International
  • Print_ISBN
    0-7803-8803-8
  • Type

    conf

  • DOI
    10.1109/RELPHY.2005.1493057
  • Filename
    1493057